Are you a Development Verification Engineer or similar with expertise in SystemVerilog and UVM, seeking an autonomous role where your work directly contributes to the success of a leading semiconductor company, with opportunities for career growth, ongoing development, and the potential to increase your earnings through a 10% company bonus? This role would suit a Development Verification Engineer with SystemVerilog and UVM skills, looking to join a world-leading semiconductor company with clear progression, specialist training, and the opportunity to boost earnings through a company bonus. Keywords: SVUVM, UVM, SV UVM, Specman-e, Functional Coverage, Testbench Development, Debugging, EDA Tools, Python, Scripting, IP Verification, Bristol, Hybrid - In
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